1. Field of the Invention
The present invention relates to a peripheral driver circuit of a liquid crystal electro-optical device, more specifically, to a peripheral driver circuit of a liquid crystal electro-optical device operated under low power consumption.
2. Description of the Related Art
The liquid crystal electro-optical device of FIG. 29, is well known in the field, and is constructed of a pixel matrix portion 2901, a signal line driver circuit 2902, and a scanning line driver circuit 2903.
In the pixel matrix portion 2901, a scanning line 2904 and a signal line 2905 are arranged in a matrix form. More specifically, in an active matrix type, a pixel thin film transistor (TFT) 2906 is arranged on a cross point, the gate electrode of the pixel TFT 2906 is connected to the scanning line 2904, the source electrode thereof is connected to the Ccsignal line 2905, and the drain electrode thereof is connected to the pixel electrode. In general, since a liquid crystal capacitor 2907 defined between the pixel electrode and the counter electrode cannot obtain a large capacitance value, a retaining capacitor 2908 for retaining electric charges is arranged adjacent to the pixel electrode.
When a voltage exceeding a threshold voltage of a pixel TFT is applied to a scanning line, thereby turning on the pixel TFT, a drain electrode of the pixel TFT and a source electrode thereof are brought into a short-circuit condition. Then, the voltage on the signal line is applied to a pixel electrode so that a liquid crystal capacitor and a retaining capacitor are charged. When the pixel TFT is turned off, the drain electrode is under open state, and then the electric charges stored in the liquid crystal capacitor and the retaining capacitor are held until the pixel TFT is subsequently turned on.
The signal line driver circuit 2902 is constructed of a shift register circuit 2909, a buffer circuit 2910, and a sampling circuit 2911. In the shift register circuit 2909, the input signal synchronized with a video signal is input into a terminal 2912, and is sequentially shifted in response to a clock pulse. The output of the shift register circuit 2909 is input via the inverter type buffer circuit 2910 to the sampling circuit 2911.
The sampling circuit 2911 is constructed of an analog switch 2913 and a retaining capacitor 2914. The analog switch 2913 is turned on/off, by the buffer circuit 2910. Under the on state, a video signal line 2915 is short-circuited with the retaining capacitor 2914, so that electric charges are stored in the retaining capacitor 2914. The signal line 2905 is connected to the retaining capacitor 2914 to transfer the sampled video signal to the respective pixels.
The scanning line driver circuit 2903 is arranged by a shift register 2916 and the NAN circuit inverter type buffer 2917, and sequentially drives the scanning lines by inputting therein the input signal synchronized with the vertical sync (synchronization) signal and the clock synchronized with the horizontal sync signal.
As the shift register circuit, there are certain possibility that either a clocked inverter 3001 of FIG. 30A or a transmission gate 3002 of FIG. 30B may be employed.
In FIG. 31, there is shown such a case that the clocked inverter structured shift register of FIG. 30A is realized by a CMOS circuit.
As a peripheral driver circuit of a liquid crystal electro-optical device, when a shift register is constructed by using a CMOS circuit on a transparent substrate on which a pixel matrix is formed, there are the following characteristic drawbacks. That is, since a P-channel type TFT and an N-channel type TFT are manufactured, a total number of manufacturing steps is increased. A characteristic of a P-channel type TFT cannot be easily made coincident with that of an N-channel type TFT. An N-channel type TFT may be readily deteriorated. To the contrary, a shift register circuit with a P-channel type TFT and a register in FIG. 32 does not include the above problems caused by the shift register by using the CMOS circuit.
In the shift register circuit using the P-channel type TFT and the register, as shown in FIG. 32, when a P-channel type TFT 3201 is turned on, a power source 3202 is short circuited via a register 3204 to a ground 3203, so that a through current may flow and thus power consumption would be increased. When the resistance value of the register 3204 is increased so as not to cause the current flow, the discharge operation cannot be easily performed, and a charge from the power source voltage to the ground voltage is delayed. That is, since the frequency characteristic is deteriorated, it is difficult to increase the resistance value. Such high power consumption would surely cause a serious problem when the liquid crystal electro-optical device is utilized in various electronic devices such as portable information devices.
The conventional liquid crystal electro-optical device of FIG. 33 includes a pixel matrix portion 3301, a signal line driver circuit 3302, and a scanning line driver circuit 3303. In the pixel matrix portion 3301, the scanning line 3304 and the signal line 3305 are arranged in a matrix form. In particular, in an active matrix type, a pixel TFT 3306 is arranged at a cross portion, the gate electrode of a pixel TFT 3306 is connected to the scanning line 3304, the source electrode thereof is connected to the signal line 3305, and the drain electrode thereof is connected to the pixel electrode.
When a voltage exceeding the threshold voltage of the pixel TFT is applied to the scanning line, the pixel TFT is turned on. In this state, the drain electrode of the pixel TFT and the source electrode thereof are brought into the short-circuit state, and the voltage on the signal line is applied to the pixel electrode, so that electric charges are stored into the liquid crystal capacitor. When the pixel TFT is turned off, the drain electrode is under open state, and the electric charges stored in the liquid crystal capacitor are held until the pixel TFT is subsequently turned on.
The liquid crystal capacitor 3307 defined between the pixel electrode and the counter electrode cannot have a large value. As a consequence, the electric charges cannot be held by the liquid crystal capacitor 3307 until the pixel TFT is turned on in the next cycle, so that the voltage applied to the liquid crystal is changed, thereby varying gradation. Therefore, the retaining capacitor 3308 for retaining the electric charges is arranged near the pixel electrode. Accordingly, when the pixel TFT is turned on, both the liquid crystal capacitor and the retaining capacitor are charged.
The signal line driver circuit is constructed of a shift register circuit 3401, a buffer circuit 3402, and a sampling circuit 3403 as shown in FIG. 34. In the shift register circuit, the input signal synchronized with the video signal is input and is sequentially shifted in response to the clock pulse. The output of the shift register circuit is input via the inverter type buffer circuit to the sampling circuit.
The sampling circuit includes an analog switch 3404 and an retaining capacitor 3405. The analog switch is turned on/off by the buffer circuit to sample the video signal. The sampled signal is held as the electric charges in the retaining capacitor. The signal line is connected to the retaining capacitor, and the sampled video signal is transferred via this signal line to the respective pixels.
As the signal line driver circuit, a decoder circuit may be utilized instead of the shift register circuit. When the respective pixels and the addresses are combined in one-to-one correspondence and then the video signal is written into the pixel, the corresponding address is input into the signal line driver circuit, and one of these signal lines is selected by the decoder circuit. On the selected signal line, the video signal is sampled by the decode signal and then is held as the electric charge in the retaining capacitor.
Further, as the signal line driver circuit, a decoder circuit and a counter circuit may be used. The/clock pulse is counted by the counter circuit, and the output of the counter circuit is used as the address signal. In response to the address signal, the signal line is selected by the decoder circuit to write the sampled video signal into the pixel.
FIG. 35 shows a case that the decoder circuit is used in the signal line driver circuit. Address signal inputs 3501 are selected by a NAND gate 3502, and the output of the NAND gate 3502 is used as the input of an analog switch 3503. The video signal is sampled by the analog switch and the sampled video signal is stored as electric charges in the retaining capacitor 3504. Another case where a decoder circuit and a counter circuit are employed in a signal line driver circuit is shown in FIG. 36. The clock pulse input 3601 is counted by a counter circuit 3602. The output of the counter circuit is selected as the address signal by a NAND gate 3603, and the output of the NAND gate 3603 is input into the analog switch 3604. The video signal is sampled by the analog switch and the sampled video signal is held as electric charges into a retaining capacitor 3605.
In FIG. 37, the scanning line driver circuit is constructed of a shift register 3701 and a NAND circuit inverter type buffer 3702. Both the input signal synchronized with the vertical sync signal and the clock synchronized with the horizontal sync signal are input into the scanning line driver circuit to sequentially drive the scanning line. Also, in this scanning line driver circuit, either a decoder circuit, or a combination of a decoder circuit and a counter circuit may be used instead of the shift register.
As a peripheral driver circuit of a liquid crystal electro-optical device, when a shift register is constructed by using a CMOS circuit on a transparent substrate on which a pixel matrix is fabricated, there are the below-mentioned characteristic drawbacks. That is, since a P-channel type TFT and an N-channel type TFT are manufactured, a total number of manufacturing steps is increased. A characteristic of a P-channel type TFT cannot be easily made coincident with that of an N-channel type TFT. To the contrary, a peripheral circuit using either a P-channel type one conductivity mode TFT, or an N-channel type one conductivity mode TFT with a register does not include the above-described problems as explained in the above-explained peripheral circuit by using the CMOS circuit.
There is shown another circuit that a P-channel type TFT and a resister are used. In FIGS. 38A to 38C, there are a NAND circuit (gate), a NOR circuit, and an inverter circuit as a basic circuit, which may constitute a JK-flip-flop of FIG. 39 and further a 4-bit counter circuit of FIG. 40. The counter circuit produces the respective output signal of a ripple carry 4005, counter bit outputs and inverted outputs 4006 in response to the respective input signals of a power supply (power source) 4001, a clear 4002, a clock 4003 and an enable 4004.
In the case that the peripheral driver circuit using the P-channel type TFT and the resister is manufactured on the transparent substrate on which the pixel matrix has been fabricated, in the circuit of FIG. 38, when the P-channel, type TFT is turned on, the power source is short-circuited via the resister to the ground, so that a through current may flow and thus power consumption would be increased. When the resistance value of the resister is increased so as not to cause the current flow, the discharge operation cannot be easily performed, and a change from the power source voltage to the ground voltage is delayed. That is, since the frequency characteristic is deteriorated, it is difficult to increase the resistance value. Such high power consumption may surely cause a serious problem when the liquid crystal electro-optical device is used in various electronic devices such as portable information devices.
An object of the present invention is to provide a peripheral driver circuit of a liquid crystal electro-optical device capable of reducing consumption power when the entire device is driven even when such a shift register circuit with high consumption power of FIG. 32 is used.
Another object of the present invention is to provide an arrangement capable of reducing power required to drive the overall liquid crystal electro-optical device even when such a peripheral driver circuit of FIG. 38 is used, namely the peripheral driver circuit arranged by a thin film transistor (TFT) and a resistor.
To solve the above problems, according to one aspect of the present invention, a peripheral driver circuit of a liquid crystal electro-optical device is comprised of a shift register circuit arranged by a plurality of registers, and a circuit for supplying power to each register or each portion. When an input signal is entered into an nth register, a supply of power to at least a portion of registers other than the nth register is stopped. The shift register circuit of the present invention is constructed of a P-channel type TFT and a resistor. The circuit for supplying the power controls the supply of power to the shift register by using the output of the shift register circuit. This circuit for supplying the power is arranged by a P-channel type TFT and a resistor. The consumption power of the circuit for supplying the power is equal to and lower than that of the shift register circuit.
According to another aspect of the present invention, a peripheral driver circuit of a liquid crystal electro-optical device is comprised of a shift register circuit arranged by a plurality of registers, and a circuit for supplying power to each register or each portion. When an input signal is entered into an nth staged register, a supply of power to the registers before an (nxe2x88x922)th register and after an (n+2)th register is stopped. The shift register circuit of the present invention is constructed of a P-channel type TFT and a resistor. The circuit for supplying the power controls the supply of power to the shift register by using the output of the shift register circuit. This circuit for supplying the power is arranged by a P-channel type TFT and a resistor. The consumption power of the circuit for supplying the power is equal to and lower than that of the shift register circuit.
According to another aspect of the present invention, a peripheral driver circuit of a liquid crystal electro-optical device is comprised of a shift register circuit arranged by a plurality of registers, and a circuit for supplying power to each register or each portion. When an input signal is entered into an nth register, a supply of power to the registers before an (nxe2x88x92x)th register and after an (n+y)th register is stopped (xxe2x89xa72, and yxe2x89xa72). The shift register circuit of the present invention is constructed of a P-channel type TFT and a resistor. The circuit for supplying the power controls the supply of power to the shift register by using the output of the shift register circuit. This circuit for supplying the power is arranged by a P-channel type TFT and a resistor. The consumption power of the circuit for supplying the power is equal to and lower than that of the shift register circuit.
According to another aspect of the present invention, a peripheral driver circuit of a liquid crystal electro-optical device is comprised of a shift register circuit arranged by a plurality of registers, and a circuit for supplying power to each register or each portion. In this peripheral driver circuit, the shift register circuit is subdivided into a plurality of blocks, each of these plural blocks is arranged by more than one register, whereas the power supply circuit is independently connected to each of these plural blocks. When an input signal is entered into a register for constituting one of plural blocks, the supply of power to any blocks other than this block is stopped. The shift register circuit of the present invention is constructed of a P-channel type TFT and a resistor. The circuit for supplying the power is operated at consumption power equal to and lower than that of the shift register.
To lower the consumption power of the overall peripheral driver circuit, operation of a shift register employed in the peripheral driver circuit will now be considered. A function required for a shift register in the peripheral driver circuit of the liquid crystal electro-optical device is to transfer one signal in synchronism with a clock. That is, only a portion of the peripheral driver circuit functions as a shift register.
Accordingly, in FIG. 1, when an input signal is entered into an nth register 103 of a shift register 102 with respect to a liquid crystal display portion 101, a supply of power to the registers before the (nxe2x88x921)th register which have transferred the signal may be stopped or interrupted, while maintaining such an output giving no adverse influence to the final stage of a buffer 104 and a sampler 105. Further, the supply of power to the registers after a (n+1)th register 107, before the input signal is transferred, may be stopped. Similarly, in a shift register 108, when the input signal is entered into the nth register 110, the supply of power to the register 111 before the (nxe2x88x921)th register, and also to the register 112 after the (n+1)th register may be stopped, while maintaining an output giving no advance influence to a buffer 109.
As described above, although high consumption power is required when the overall circuit is operated, overall consumption power may be suppressed by operating only the necessary circuit portion, even if the respective consumption power thereof is not changed.
In FIG. 12A, there is shown the peripheral driver circuit of the liquid crystal electro-optical device comprising a shift register circuit arranged by a plurality of registers, and a circuit for supplying power to each register or each portion. When an input signal is entered into an nth register, a supply of power to the registers before an (nxe2x88x922)th register and after an (n+2)th register is stopped.
In the shift register for the peripheral driver circuit of the liquid crystal electro-optical device, when the two adjacent registers simultaneously produce an active output, the (nxe2x88x921)th register also produces the active output at a time when the input signal has reached the nth register, so that the supply of power to the registers before the (nxe2x88x922)th resister may be stopped.
When a pulse width is surely defined by one time period of the clock, the supply of power to the (n+1)th register which needs not produce the active output when the input signal reaches the nth register is started, and then the input signal is surely transferred at the next clock change. As a consequence, when the input signal reaches the nth register, the supply of power to the registers after the (n+2)th register may be stopped. When it is allowable in any changes of the pulse width of the input signal caused by the element delay, the supply of power to the registers after (n+1)th register may be stopped.
In FIG. 18A, when a total element number is desirably reduced rather than a reduction of consumption power, stopping of the power supply is not limited to the above case, i.e., the power supply to the registers before the (nxe2x88x922)th register and after the (n+2)th register is stopped. That is, when the input signal reaches the nth register, the supply of power to the (nxe2x88x92x)th registers (xxe2x89xa72) may be stopped because the power supplying operation to the (nxe2x88x922)th register is continued, and no power supplying operation to the (nxe2x88x923)th nor (nxe2x88x924)th registers is carried out.
When the input signal reaches the nth register, the power supplying operation to the (n+y)th register (yxe2x89xa72) may be stopped, because the power is supplied to the (n+2)th register and no power supplying operation to the (n+3)th and (n+4)th registers is carried out.
In FIG. 4, there is shown the peripheral driver circuit of the liquid crystal electro-optical device comprising a shift register circuit arranged by a plurality of registers, and a circuit for supplying power to each register or each portion. The shift register circuit has a plurality of blocks. Each block is constructed by at least two register. The power supply circuits are connected with each block independently. When an input signal is entered to a register included in one of the blocks, the power supply to blocks other than the one block is stopped.
The power supply circuit is shown in FIG. 8. It is possible that the control circuit is provided with each of these registers, to control a single register. When the control circuit becomes complex, it is preferable that several registers are combined with each other to construct one block for control. In this state, the power supply voltage is applied to two blocks during such a time period when the input signal is transmitted/received between these blocks. The power supply voltage is applied to one block for receiving the input signal, whereas the supply of power to the other block for receiving no input signal may be stopped.
Further, a peripheral driver circuit of a liquid crystal electro-optical device is arranged by one conductivity type TFT and a capacitor. Alternatively, a peripheral driver circuit of a liquid crystal electro-optical device includes a circuit for controlling a power supply operation, which is constructed of one conductivity type TFT, a resistor and a capacitor.
According to one aspect of the present invention in the peripheral driver circuit of the liquid crystal electro-optical device, when the power is supplied to the circuit portion required to specify the pixel, the power supply operation to at least a portion of the above circuit portion is interrupted.
According to another aspect of the present invention in the peripheral driver circuit of the liquid crystal electro-optical device, when the power is supplied to the circuit portion required to specify the pixel, the power supply voltage applied to at least a portion of the above circuit portion is lowered.
Also, according to another aspect of the present invention, in the scanning line driver circuit of the peripheral driver circuit of the liquid crystal electro-optical device, when either the voltage is applied to the nth pixel, or the sampling signal is sampled by the nth sampling circuit in the signal line driver circuit, the power supply voltage is lowered which is applied to the portions corresponding to the pixels after the (n+1)th pixel, and the portions corresponding to the pixels before the (nxe2x88x922)th pixel.
In the peripheral driver circuit of the liquid crystal electro-optical device according to another aspect of the present invention, when either the voltage is applied to the nth pixel, or the sampled video signal is written into the nth pixel, the power supply voltage is reduced which is applied to the portion corresponding to (n+x)th pixel (xxe2x89xa71) and the portion corresponding to (nxe2x88x92y)th pixel (yxe2x89xa72) in the peripheral driver circuit.
In the peripheral driver circuit of the liquid crystal electro-optical device according to another aspect of the present invention, when a plurality of pixels having the matrix arrangement are subdivided into a plurality of blocks, and there is neither such a pixel to which the voltage is applied, nor such a pixel into which the sampled video signal is written, the power supply operation to at least a portion corresponding to the pixel in the block is stopped.
In the peripheral driver circuit of the liquid crystal electro-optical device according to another aspect of the present invention, when a plurality of pixels having the matrix structure are subdivided into a plurality of blocks and there is either a pixel to which the voltage is applied in the nth block among the plural blocks, or a pixel into which the sampled video signal is written, the power supply operation to the peripheral driver circuit corresponding to the pixel of at least a portion of the blocks after the (N+1)th block and before the (nxe2x88x921)th block is stopped.
In the peripheral driver circuit of the liquid crystal electro-optical device according to another aspect of the present invention, when a plurality of pixels having the matrix structure are subdivided into a plurality of blocks and there is either a pixel to which the voltage is applied in the nth block among the plural blocks, or a pixel into which the sampled video signal is written, the power supply operation to the peripheral driver circuit corresponding to the pixel of at least a portion of the (n+x)th block and the (nxe2x88x92y)th block (xxe2x89xa71 and yxe2x89xa71).
In the peripheral driver circuit of the liquid crystal electro-optical device according to another aspect of the present invention, when a plurality of pixels having the matrix arrangement are subdivided into a plurality of blocks, and there is neither such a pixel to which the voltage is applied, nor such a pixel into which the sampled video signal is written, the power supply operation to at least a portion corresponding to the pixel in the block is lowered.
In the peripheral driver circuit of the liquid crystal electro-optical device according to another aspect of the present invention, when a plurality of pixels having the matrix structure are subdivided into a plurality of blocks and there is either a pixel to which the voltage is applied in the nth block among the plural blocks, or a pixel into which the sampled video signal is written, the power supply operation to the peripheral driver circuit corresponding to the pixel of at least a portion of the blocks after the (n+1)th block and before the (nxe2x88x921)th block is lowered.
In the peripheral driver circuit of the liquid crystal electro-optical device according to another aspect of the present invention, when a plurality of pixels having the matrix structure are subdivided into a plurality of blocks and there is either a pixel to which the voltage is applied in the nth block among the plural blocks, or a pixel into which the sampled video signal is written, the power supply operation to the peripheral driver circuit corresponding to the pixel of at least a portion of the blocks after the (n+1)th block and before the (nxe2x88x921)th block is lowered.
To reduce consumption power in the peripheral driver circuit of the liquid crystal electro-optical device, the peripheral driver circuit will now be considered. A voltage difference about 5 V is required to drive a liquid crystal in view of a transmittance-to-voltage characteristic. While a DC voltage is applied to a liquid crystal, the liquid crystal would be deteriorated. As a consequence, when the liquid crystal is driven by an AC voltage, a voltage difference requires approximately 10 V, so that the power supply voltage of the peripheral driver circuit requires 20 V or more.
In the point sequential scanning operation, since a video signal is written into a certain pixel, the peripheral driver circuit samples the video signal to turn on a pixel TFT. That is, the overall peripheral driver circuit is operated so as to specify one pixel. It should be noted in the following specification that both of the below-mentioned operations will be referred as xe2x80x9ca pixel being specifiedxe2x80x9d. That is, a video signal is sampled with respect to a pixel by the signal line driver circuit to charge a retaining capacitor, and/or a pixel TFT connected to a scanning line is brought into an on state by the scanning line driver circuit.
As a consequence, even when the power is supplied to the entire peripheral driver circuit, only a portion thereof is operable. Therefore, as to the non-functional (not operated) circuit portion, namely the portion not for specifying the pixel of the peripheral driver circuit, the power supply voltage may be reduced, or the power supply may be stopped so as to prevent erroneous operation thereof.
In the portion not for specifying the pixel in the peripheral driver circuit, the power supply voltage is lowered at or below 20 V to reduce consumption power. Thus, minimum consumption power is realized. Normally, while the peripheral driver circuit is operated under voltages equal to or lower than 20 V, the power supply voltage is set to 20 V only when the pixel is specified, resulting in low consumption power.
As described above, when the overall circuit is operated, high power is consumed. However, since the high power supply voltage is applied only to the required portion, the overall consumption power can be suppressed even when the respective consumption powers do not change.
Concretely speaking, in the circuit of FIG. 34, it is assumed that a circuit for firstly specifying a pixel in response to an input signal is a first circuit, and a circuit for finally specifying a pixel is an m-th circuit. When the input signal reaches an nth circuit, an output of the nth circuit becomes active. In the circuit of FIG. 34, an output of an (nxe2x88x921)th circuit also becomes active. As a result, since outputs of other circuits become not active, the power supply voltage can be reduced. That is, the power supply voltage to the (nxe2x88x922)th, (nxe2x88x923)th, . . . circuit portions may be reduced. Also, the power supply voltage to the (n+1)th, (n+2)th, . . . , circuit portions may be lowered. It should be noted that while the power supply voltage to the (nxe2x88x922)th circuit portion remains, the power supply voltage to the (nxe2x88x923)th, (nxe2x88x924)th, . . . circuit portions may be reduced. Also, while the power supply voltage to the (n+1)th circuit portion is not charged, the power supply voltage to the (n+2)th, (n+3)th, . . . circuit portions may be reduced.
Further, several pixels are combined with each other to constitute one block, and the power supply may be controlled for the respective blocks. A block for firstly specifying a pixel is referred to a first block, and the subsequent blocks are sequentially numbered. When the circuit for specifying the pixel is present in the nth block, the power supply operation to the (n+1)th, (n+2)th, . . . , blocks may be stopped, or the power supply voltage thereof may be reduced. Alternatively, while the power supply of the (n+1)th block is not changed, the power supply operation to the (n+2)th, (n+3)th, . . . , blocks may be stopped, or the power supply voltage thereof may be lowered. Alternatively, while the power supply of the (nxe2x88x921)th block is not charged, the power supply operation to the (nxe2x88x922)th, (nxe2x88x923)th, . . . blocks may be stopped, or the power supply voltage thereof may be lowered.